evidence: publish HP ENVY HDA records
Source-Sha: df779aa3e2cdb4774c0012b2f4f44791307634c6 Policy-Sha: 4c7fb444a162068e847747dd5a03c057631225e8eb05e44d0e358eae6c4e4266 Tree-Digest: 1c9cc7ba9fa0cdc70bcfa82d4eda9a4dbec0a391b9106858d0f69b944ac7cdb7
This commit is contained in:
Casey Tunturi
commit
4ce9e03773
44 changed files with 51208 additions and 0 deletions
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@ -0,0 +1,151 @@
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From 041e8d4dd82a6a987797c474856739dd9eb38f01 Mon Sep 17 00:00:00 2001
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From: Casey Tunturi <casey@samaritansolutions.net>
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Date: Fri, 28 Aug 2026 15:55:43 -0400
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Subject: [PATCH] ALSA: hda: intel: reset link for HP ENVY 27-p014
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MIME-Version: 1.0
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Content-Type: text/plain; charset="utf-8"
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Content-Transfer-Encoding: 7bit
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Message-Id: <20260828-hp-envy-27-hda-reset-v1-1-718428502580@samaritansolutions.net>
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X-Change-ID: 20260828-hp-envy-27-hda-reset-40651087e528
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While bringing up audio on an HP ENVY 27-p014, I found that the normal
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link reset only discovers the HDMI codec. The CX20753/4 at address 0
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appears after a second CRST pulse, with STATESTS left alone and no fixed
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delays.
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I added that pulse when address 0 is missing, and again before the codecs
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resume. Initial setup uses immediate commands long enough to add the
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codec, then returns the controller to CORB/RIRB.
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That brought analog audio up at boot, and capture kept working through
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four deep suspend and resume cycles.
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Signed-off-by: Casey Tunturi <casey@samaritansolutions.net>
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---
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sound/hda/controllers/intel.c | 77 +++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 77 insertions(+)
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diff --git a/sound/hda/controllers/intel.c b/sound/hda/controllers/intel.c
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index 24015c73a..0be97a46f 100644
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--- a/sound/hda/controllers/intel.c
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+++ b/sound/hda/controllers/intel.c
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@@ -987,6 +987,46 @@ static bool azx_is_pm_ready(struct snd_card *card)
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return true;
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}
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+static bool hp_envy_27_needs_reset(struct azx *chip)
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+{
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+ struct pci_dev *pci = chip->pci;
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+
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+ return pci->subsystem_vendor == 0x103c &&
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+ pci->subsystem_device == 0x2b3e;
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+}
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+
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+static u16 hp_envy_27_reset_link(struct azx *chip)
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+{
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+ struct hdac_bus *bus = azx_bus(chip);
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+ u32 gctl;
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+ u16 statests;
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+ int timeout;
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+
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+ snd_hdac_bus_stop_chip(bus);
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+
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+ gctl = snd_hdac_chip_readl(bus, GCTL);
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+ snd_hdac_chip_writel(bus, GCTL, gctl & ~AZX_GCTL_RESET);
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+ for (timeout = 250; timeout; timeout--) {
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+ if (!(snd_hdac_chip_readl(bus, GCTL) & AZX_GCTL_RESET))
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+ break;
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+ udelay(1);
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+ }
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+
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+ gctl = snd_hdac_chip_readl(bus, GCTL);
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+ snd_hdac_chip_writel(bus, GCTL, gctl | AZX_GCTL_RESET);
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+ for (timeout = 250; timeout; timeout--) {
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+ if (snd_hdac_chip_readl(bus, GCTL) & AZX_GCTL_RESET)
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+ break;
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+ udelay(1);
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+ }
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+
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+ statests = snd_hdac_chip_readw(bus, STATESTS);
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+ bus->codec_mask |= statests;
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+ snd_hdac_bus_init_chip(bus, false);
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+
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+ return statests;
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+}
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+
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static void __azx_runtime_resume(struct azx *chip)
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{
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struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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@@ -1003,6 +1043,8 @@ static void __azx_runtime_resume(struct azx *chip)
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azx_init_pci(chip);
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hda_intel_init_chip(chip, true);
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+ if (chip->pm_prepared && hp_envy_27_needs_reset(chip))
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+ hp_envy_27_reset_link(chip);
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/* Avoid codec resume if runtime resume is for system suspend */
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if (!chip->pm_prepared) {
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@@ -2356,6 +2398,34 @@ static const unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
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[AZX_DRIVER_TERA] = 1,
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};
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+static int hp_envy_27_probe_codec(struct azx *chip)
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+{
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+ struct hdac_bus *bus = azx_bus(chip);
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+ struct hda_codec *codec = NULL;
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+ bool use_pio;
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+ int probe_mask;
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+ int err;
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+
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+ if (!hp_envy_27_needs_reset(chip) || (bus->codec_mask & BIT(0)))
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+ return 0;
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+ if (!(hp_envy_27_reset_link(chip) & BIT(0)))
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+ return -ENODEV;
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+
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+ probe_mask = chip->codec_probe_mask;
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+ use_pio = bus->use_pio_for_commands;
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+ chip->codec_probe_mask = BIT(0);
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+ bus->use_pio_for_commands = true;
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+ err = snd_hda_codec_new(&chip->bus, chip->card, 0, &codec);
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+ chip->codec_probe_mask = probe_mask;
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+ if (!err && codec)
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+ err = snd_hda_codec_configure(codec);
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+ else if (!err)
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+ err = -ENODEV;
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+ bus->use_pio_for_commands = use_pio;
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+
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+ return err;
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+}
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+
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static int azx_probe_continue(struct azx *chip)
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{
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struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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@@ -2428,6 +2498,11 @@ static int azx_probe_continue(struct azx *chip)
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}
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}
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+ err = hp_envy_27_probe_codec(chip);
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+ if (err < 0 && err != -ENODEV)
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+ dev_warn(chip->card->dev,
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+ "failed to probe HP ENVY 27 analog codec: %d\n", err);
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+
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err = snd_card_register(chip->card);
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if (err < 0)
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goto out_free;
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@@ -2444,6 +2519,8 @@ static int azx_probe_continue(struct azx *chip)
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pm_runtime_allow(&pci->dev);
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pm_runtime_put_autosuspend(&pci->dev);
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}
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+ if (hp_envy_27_needs_reset(chip))
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+ pm_runtime_forbid(&pci->dev);
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out_free:
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if (err < 0) {
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---
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base-commit: c4a0927f535f779700d5ccda8182c2db01e9d551
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change-id: 20260828-hp-envy-27-hda-reset-40651087e528
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Best regards,
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--
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Casey Tunturi <casey@samaritansolutions.net>
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